Journal papers
1. A. Madanayake, and L. T. Bruton, “A Speed-optimized Systolic-array Processor Architecture for Spatio Temporal 2D IIR Broadband Beam Filters,” IEEE Transactions on Circuits and Systems-I: Regular papers , vol. 55, no. 7, pp. 1953-1966, August 2008.
2. A. Madanayake, and L. T. Bruton, “A Systolic-Array Architecture for First-Order 3-D IIR Frequency-Planar Filters,” IEEE Transactions on Circuits and Systems-I: Regular Papers , vol. 55, no. 6, pp. 1546-1559, July 2008.
3. A. Madanayake, and L. T. Bruton, “Low-complexity distributed parallel processor for 2D IIR broadband beam plane-wave filters,” Canadian Journal of Electrical and Computer Engineering (CJECE) , vol. 32, no. 3, pp. 123-131, Summer 2007.
4. A. Madanayake, S. V. Hum, and L. T. Bruton, “A Systolic Array 2D IIR Broadband RF Beamformer,” IEEE Transactions on Circuits and Systems-II: Express Briefs , vol. 55, no. 12, pp. 1244-1248, December 2008.
5. A. Madanayake, and L. T. Bruton, “A Fully-multiplexed First-order Frequency-planar Module for Fan, Beam, and Cone Plane-wave Filters,” IEEE Transactions on Circuits and Systems-II: Express Briefs, vol. 53, no. 8, pp. 697-701, August 2006.
6. S. V. Hum, A. Madanayake, and L. T. Bruton, “UWB Beamforming using 2-D Beam Digital Filters,” IEEE Transactions on Antennas and Propagation (TAP) , vol. 57, no. 3, pp. 804-807, March 2009.
7. A. Madanayake, S. V. Hum, and L. T. Bruton, “Effects of Quantization in Systolic 2D Beam Filters on the Performance of UWB Communications,” Springer Journal of Circuits, Systems, and Signal Processing , vol. 31, no. 2, pp. 595-610, April 2012.
8. A. Madanayake, T. K. Gunaratne, and L. T. Bruton, “Massively-parallel systolic-array architectures for 2D IIR polyphase space-time plane-wave beam digital filters,” International Journal of Circuit Theory and Applications (CTA), Wiley-Blackwell , vol. 40, no. 5, pp. 455-475, November 2010.
9. A. Madanayake, R. J. Cintra, V. S. Dimitrov, and L. T. Bruton, “Block Parallel Systolic Array
Architectures for 2-D NTT-based Fragile Watermark Embedding,” Parallel Processing Letters (PPL), vol. 22, no. 3, September 2012.
10. A. Madanayake, T. K. Gunaratne, and L. T. Bruton, “Reducing The Multiplier Complexity of Massively Parallel Polyphase 2D IIR Broadband Beam Filters,” Circuits, Systems and Signal Processing (CSSP) , vol. 31, no. 3, pp. 1229-1243, April 2012.
11. N. Arbabi, M. Almalkawi, V. Devabhaktuni, M. Yagoub, and A. Madanayake, “A compact realization of composite lowpass filter for monolithic microwave integrated circuit (MMIC) applications,” International Journal of RF and Microwave Computer-Aided Engineering , vol. 22, no. 2, pp. 147-152, March 2012.
12. R. M. Joshi, A. Madanayake, L. T. Bruton, and J. Adikari, “Synthesis and Array Processor Realization of a 2D IIR Beam Filter for Wireless Applications,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems , vol. 20, no. 12, pp. 2241-2254, December 2012.
13. A. Madanayake, R. J. Cintra, N. Rajapaksha, D. Onen, V. S. Dimitrov, A. Edirisuriya, and L. T. Bruton, “A Row-parallel 88 2-D DCT Architecture Using Algebraic Integer Based Exact Computation,” IEEE Transactions on Circuits and Systems for Video Technology , vol. 22, no. 6, pp. 915-929, June 2012.
14. C. Wijenayake, Y. Xu, A. Madanayake, L. Belostotski, and L. T. Bruton, “RF Analog Beamforming Fan Filters Using CMOS All-pass Time Delay Approximations,” IEEE Transactions on Circuits and Systems:-I: Regular Papers, Special Issue , vol. 59, no. 5, pp. 1061-1073, May 2012.
15. N. Rajapaksha, A. Madanayake, and L. T. Bruton, “2D Space-time Wave-Digital Multi Fan Filter Banks for Signals Consisting of Multiple Plane Waves,” Multi Dimensional Systems and Signal Processing (MSSP) , vol. 25, no. 1, pp. 17-39, April 2012.
16. A. Edirisuriya, A. Madanayake, R. J. Cintra, V. S. Dimitrov, and J. Adikari, “VLSI Architecture for 8-Point AI based Arai-DCT having Low AT Complexity and Power at Improved Accuracy,” Journal of Low Power Electronics and Applications, Special Issue on Recent Developments , vol. 2, no. 2, pp. 127-142, March 2012.
17. L. T. Bruton, A. Madanayake, C. Wijenayake, and M. Maini, “Continuous-Time Analog Two-
Dimensional IIR Beam Filters,” IEEE Transactions on Circuits and Systems-II: Express Briefs , vol. 59, no. 7, pp. 419-423, July 2012.
18. L. Belostotski, A. Madanayake, and L. T. Bruton, “Wideband LNA using an active -C element,” IEEE Microwave and Wireless Components Letters , vol. 22, no. 10, pp. 524-526, 2012.
19. C. Wijenayake, A. Madanayake, and L. T. Bruton, “Broadband Multiple Cone Beam 3-D IIR Digital Filters Applied to Planar Dense Aperture Arrays,” IEEE Transactions on Antennas and Propagation (TAP) , vol. 60, no. 11, pp. 5136-5146, November 2012.
20. S. Kondapalli, A. Madanayake, and L. T. Bruton, “Digital Architectures for UWB Beamforming using 2-D IIR Spatio-temporal Frequency-Planar Filters,” Hindawi Transactions on Antennas and Propagation, Special Issue on Beamforming Networks , vol. 2012, 19 pages, June 2012.
21. F. Bayer, R. J. Cintra, A. Edirisuriya, and A. Madanayake, “A Digital Hardware Fast Algorithm and nFPGA-based Prototype for a Novel 16-point Approximate DCT for Image Compression Applications,” Institute of Physics (IoP) Measurement Science and Technology, Special Issue on Imaging , vol. 23, no. 11, October 2012.
22. S. Madhishetty, A. Madanayake, R. J. Cintra, V. S. Dimitrov, and D. Mugler, “VLSI Architectures for the 4-tap and 6-tap 2-D Daubechies Wavelet Filters using Algebraic Integers,” IEEE Transactions on Circuits and Systems-I: Regular Papers , vol. 60, no. 6, pp. 1455-1468, June 2013.
23. U. Potluri, A. Madanayake, R. J. Cintra, F. Bayer, and N. Rajapaksha, “Multiplier-Free DCT Approximations for RF Multi-Beam Digital Aperture-Array Space Imaging and Directional Sensing,” Institute of Physics (IoP) Measurement Science and Technology, Special Issue on Imaging , vol. 23, no. 11, November 2012.
24. A. Madanayake, C. Wijenayake, D. Dansereau, T. K. Gunaratne, L. T. Bruton, and S. Williams, “Multidimensional (MD) Circuits and Systems For Emerging Applications Including Cognitive Radio, Radio Astronomy, Robot Vision and Imaging,” IEEE Circuits and Systems Society Magazine , vol. 13, no. 1, pp. 10-43, First Quarter 2013.
25. N. Rajapaksha, A. Edirisuriya, A. Madanayake, R. J. Cintra, D. Onen, I. Amer, and V. S. Dimitrov, “Asynchronous Realization of Algebraic Integer based 2-D DCT using Achronix Speedster SPD60 FPGA,” Hindawi Journal of Electrical and Computer Engineering Special Issue on Hardware Implementation of DSP Algorithms , vol. 2013, 9 pages, February 2013.
26. R. Wimalagunaratne, C. Wijenayake, A. Madanayake, D. Dansereau, and L. T. Bruton, “Integral Form 4-D Light Field Filters using Xilinx FPGAs and 45 nm CMOS Technology,” Multidimensional Systems and Signal Processing , vol. 26, no.1, pp 47-65, May 2013.
27. J. Adams, A. Madanayake, and L. T. Bruton, “Approximate Realization of Fractional-Order 2-D IIR Frequency-Planar Filters,” IEEE Journal of Emerging and Selected Topics in Circuits and Systems (JETCAS), Special Issue on Fractional Order Systems , vol. 3, no. 3, pp. 338-345, September 2013.
28. A. Edirisuriya, N. Rajapaksha, A. Madanayake, and V. S. Dimitrov, “A Single-Channel Architecture for Algebraic Integer Based 88 2-D DCT Computation,” IEEE Transactions on Circuits and Systems for Video Technology (TCSVT) , vol. 23, no. 12, pp. 2083-2089, December 2013.
29. A. Madanayake, R. Wimalagunaratne, D. Dansereau, R. J. Cintra, and L. T. Bruton, “VLSI Architecture for 4D Depth Filtering,” Signal, Image and Video Processing , vol. 9, no. 4, pp. 809-818, May 2013.
30. S. Madhishetty, A. Madanayake, R. J. Cintra, D. Mugler, and V. S. Dimitrov, “Algebraic Integer Architecture With Minimum Adder Count for the 2-D Daubechies 4-tap Filters Banks,” Multidimensional Systems and Signal Processing (MSSP) , vol. 25, no. 4, pp. 829-845, August 2013.
31. J. Kota, C. Wijenayake, A. Madanayake, L. Belostotski, and L. T. Bruton, “A 2-D Signal Processing Model to Predict the Effect of Mutual Coupling on Array Factor,” IEEE Antennas and Wireless Propagation Letters (AWPL) , vol. 12, pp. 1264-1267, October 2013.
32. A. Madanayake, C. Wijenayake, J. S. Kota, and L. T. Bruton, “Space-Time Spectral White Spaces in Cognitive Radio: Theory, Algorithms and Circuits,” IEEE Journal of Emerging and Selected Topics in Circuits and Systems (JETCAS), Special Issue on Cognitive/Software-Defined Radio , vol. 3, no. 4, pp. 640-653, December 2013.
33. A. Madanayake, C. Wijenayake, R. M. Joshi, L. Belostotski, M. Almalkawi, L. T. Bruton, and
V. Devabhaktuni, “Electronically Scanned RF-to-Bits Beam Aperture Arrays Using 2-D IIR Spatially Bandpass Digital Filters,” Multi-Dimensional Systems and Signal Processing (MSSP), Special Issue on ND-applications , vol. 25, no. 2, pp. 313-335, September 2013.
34. U. Potluri, A. Madanayake, R. J. Cintra, F. Bayer, A. Edirisuriya and S. Kulasekera, “Improved 8-Point Approximate DCT for Image and Video Compression Requiring Only 14 Additions,” IEEE Transactions on Circuits and Systems-I: Regular Papers , vol. 61, no. 6, pp. 1727-1740, June 2014.
35. S. Madhishetty, A. Madanayake, R. J. Cintra, and V. S. Dimitrov, “Precise VLSI Architecture for AI based 1-D/2-D Daub-6 Wavelet Filter banks with Low Adder-Count,” IEEE Transactions on Circuits and Systems-I: Regular Papers , vol. 61, no. 7, pp. 1984-1993, July 2014.
36. C. Wijenayake, A. Madanayake, L. Belostotski, Y. Xu, and L.T. Bruton, “All-Pass Filter-Based 2-D IIR Filter-Enhanced Beamformers for AESA Receivers,” IEEE Transactions on Circuits and Systems-I: Regular Papers, Special Issue on ISCAS , vol. 61, no. 5, pp. 1331-1342, May 2014.
37. A. Madanayake, C. Wijenayake, S. Wijeratna, R. Acosta, and S. I. Hariharan, “2D-IIR Time-Delay-Sum Linear Aperture Arrays,” IEEE Antennas and Propagation Letters (AWPL) , vol. 13, pp. 591-594, April 2014.
38. A. Madanayake, R. J. Cintra, F. Bayer, V.S. Dimitrov, K. Wahid, N. Rajapaksha, S. Kulasekara, A. Edirisuriya, S. Madhishetty, and U. Potluri, “Low-Power VLSI Architectures for DCT/DWT: Precision vs Approximation for HD Video, Biomedical, and Smart Antenna Applications,” IEEE Circuits and Systems Magazine , vol. 15, no. 1, pp. 25-47, 2014.
39. T. L. T. daSilveira, F. Bayer, R. J. Cintra, S. Kulasekera, A. Madanayake, and A. J. Kozakevicius, “An orthogonal 16-point approximate DCT for image and video compression,” Multidimensional Systems and Signal Processing (MSSP), Springer , vol. 27, no. 1, pp. 87-104, 2014.
40. D. Suarez, R. J. Cintra, F. Bayer, S. Kulasekera, and A. Madanayake, “Multi-Beam RF Aperture using Multiplierless FFT Approximation,” IET Electronics Letters , vol. 50, no. 24, pp. 1788-1790, November 2014.
41. N. Rajapaksha, A. Madanayake, and L.T. Bruton, “Systolic-Array Architecture for Steerable Multi-Beam VHF Wave-Digital RF Apertures,” IEEE Transactions on Aerospace and Electronic Systems , vol. 51, no. 1, pp. 669-687, January 2015.
42. L. Belostotski, K. Warnick, B. Veidt and A. Madanayake, “Low Noise Amplifier Design Considerations For Use in Antenna Arrays,” IEEE Transactions on Antennas and Propagation, vol. 63, no. 6, pp. 2508-2520, June 2015.
43. N. Rajapaksha, A. Madanayake, R. J. Cintra, V. S. Dimitrov, and J. Adikari, “VLSI Computational Architectures for the Arithmetic Cosine Transform,” IEEE Transactions on Computers , vol. 64, no. 9, pp. 2708-2715, September 2015.
44. P. Oliveira, R. J. Cintra, F. Bayer, S. Kulasekara, and A. Madanayake, “A Discrete Tchebichef Transform Approximation for Image and Video Coding,” IEEE Signal Processing Letters (SPL) , vol. 22, no. 8, pp. 1137-1141, August 2015.
45. P. Ahmadi, M. Taghavi, L. Belostotski, and A. Madanayake, “A 0.13-m CMOS Current-Mode All-Pass Filter for Multi-GHz Operation,” IEEE Transactions on VLSI Systems , vol. 23, no. 12, pp. 2813-2818, December 2015.
46. Y. Pauchard, R. J. Cintra, A. Madanayake, and F. Bayer, “Fast Computation of Residual Complexity Image Similarity Metric Using Low-complexity Transforms,” IET Image Processing , vol. 9, no. 8, pp. 1-10, August 2015.
47. S. Wijeratna, C. Wijenayake, A. Madanayake, and L. T. Bruton, “Digital VLSI Architectures for Beam Enhanced RF Aperture Arrays,” IEEE Transactions on Aerospace and Electronic Systems , vol. 51, no. 3, pp. 1996-2011, July 2015.
48. V. Devabhaktuni, K. Alshamaileh, and A. Madanayake, “Multi-way Impedance-varying Power Dividers for Wideband Applications,” International Journal of RF and Microwave Computer Aided Engineering, vol. 25, no. 8, October 2015.
49. P. Ahmadi, B. Maundy, A. Elwakil, L. Belostotski, and A. Madanayake, “A New 2nd-Order Allpass Filter in 130nm CMOS,” IEEE Transactions on Circuits and Systems-II: Express Briefs, vol. 63, no. 3, pp. 249-253, March 2016.
50. P. Oliveira, R. J. Cintra, F. Bayer, S. Kulasekera, and A. Madanayake, “Low-complexity Image and Video Coding Based on an Approximate Discrete Tchebichef Transform,” IEEE Transactions on Circuits and Systems for Video Technology , vol. 27, no. 5, pp. 1066-1076, 2015.
51. F. Bayer, R. J. Cintra, V. Coutinho, S. Kulasekera, A. Madanayake, and A. Wanderley, “Energy-efficient 8-point DCT Approximations: Theory and Hardware Architectures,” Springer Journal of Circuits, Systems and Signal Processing (CSSP) , vol. 35, no. 11, pp. 4009-4029, 2016.
52. S. Wijeratne, N. Rajapaksha, A. Madanayake and L. T. Bruton, “Fast FPGA-Architecture for Fan/Beam-Steering in Wave-Digital RF Aperture Arrays,” Multi-Dimensional Systems and Signal Processing (MSSP) , vol. 28, no. 4, pp. 771-789, 2017.
53. D. Coelho, S. Kulasekera, R. J. Cintra, and V. S. Dimitrov, “Error-Free Computation of 8-point DCT Based on the Loeffler Factorization and Algebraic Integers,” IET Signal Processing , vol. 10, no. 6, pp. 633-640, 2016.
54. A. Sengupta, A. Madanayake, R. Gomez-Garcia, and L. Belostotski, “Wide-Band Aperture Array Using a Four-channel Manifold-Type Planar Multiplexer and Digital 2-D IIR Filterbank,” Circuit Theory and Applications , vol. 44, no. 12, pp. 2085-2100, 2016.
55. N. Udayanga, T. Randeny, C. Wijenayake, A. Sengupta, A. Madanayake, L. T. Bruton, and G. Jones, “Applications of RF Aperture-Array Spatially-Bandpass 2-D IIR Filters in Sub-Nyquist Spectrum Sensing,” Multi-Dimensional Systems and Signal Processing (MSSP) , vol. 28, no. 4, pp. 1-26, 2016.
56. V. Ariyarathna, A. Madanayake, P. Agathoklis and L. T. Bruton, “Mixed Microwave-Digital and Multi-Rate Approach for Wideband Beamforming Applications Using 2-D IIR Beam Filters and Nested Uniform Linear Arrays,” Multi-Dimensional Systems and Signal Processing (MSSP), Special Issue on Array Signal Processing , 2016.
57. R. J. Cintra, F. Bayer, A. Madanayake, A. Edirisooriya, “Fast Algorithms and Architectures for 8-point DST-II/DST-VII Approximations,” Journal of Circuits, Systems and Computers (JCSC) , vol. 26, no. 3, 2017.
58. T. Silvera, R. Oliveira, R. J. Cintra, and A. Madanayake, “Multiplierless 16-point DCT Approximation for Low-complexity Image and Video Coding,” Signal, Image and Video Processing, vol. 11, no. 2, pp. 227-233, 2017.
59. D. Coelho, R. J. Cintra, V. S. Dimitrov, N. T. Rajapaksha, G. Mendis and A. Madanayake, “DFT Computation using Gauss-Eisenstein Basis: FFT Algorithms and VLSI Architectures,” IEEE Transactions on Computers , vol. 66, no. 8, pp. 1442-1448, 2017.
60. P. Oliveira, R. Oliveira, R. J. Cintra, F. Bayer and A. Madanayake, “JPEG quantisation requires bit-shifts only,” IET Electronics Letters , vol. 51, no. 9, pp. 588-590, 2017.
61. V. Seneviratne, A. Madanayake, and L. T. Bruton, “Multidimensional-DSP Beamformers using The ROACH-2 FPGA Platform,” MDPI Electronics, Special Issue on Smart Antennas and MIMO Communications , vol. 6, no. 3, July 2017.
62. V. Coutinho, R. J. Cintra, F. Bayer, P. Oliveira, R. Oliveira, and A. Madanayake, “Pruned Discrete Tchebichef Transform Approximation for Image Compression” Springer Circuits, Systems and Signal Processing (CSSP), 2017, Accepted.
63. B. Lao, A. Madanayake, and P. Agathoklis, Guest Editorial for Special Issue on Array Signal Processing and Systems, Multi-Dimensional Systems and Signal Processing, 2018.
64. S. Perera, V. Ariyarathna, N. Udayanga, A. Madanayake, G. Wu, L. Belostotski, Y. Wang, S. Mandal, R. Cintra, and T. Rappaport, “Wideband N-Beam Arrays using Low-Complexity Algorithms and Mixed Signal Integrated Circuits”, IEEE Journal of Selected Topics in Signal Processing, 2018, In press.
65. V. Ariyarathna, L. Belostotski, S. Mandal, X. Tang, R. Cintra, A. Madanayake and T. Rappaport, “Analog Approximate-FFT 8/16-Beam Algorithms, Architectures and CMOS Circuits for 5G Beamforming MIMO Transceivers”, IEEE Journal of Emerging and Selected Topics in Circuits and Systems (JETCAS), 2018, In press.
66. S. Perera, A. Madanayake, N. Dornback, and N. Udayanga, “Design and Digital Implementation of Fast and Recursive DCT II-IV Algorithms”, Springer Circuits, Systems and Signal Processing (CSSP), 2018, Accepted.
67. R. Cintra, D. Coelho, S. Nimalapalli, V. S. Dimitrov, A. Madanayake and A. Tisserand, “Computation of 2D 8Å~ 8 DCT Based on the Loeffler Factorization Using Algebraic Integer Encoding”, IEEE Transactions on Computers (TCOMP), 2018, In press.
68. C. Wijenayake, N. Udayanga, S. Pulipati, A. Madanayake and L. T. Bruton, “Low-Complexity Wideband Transmit Beamforming using Network-Resonant Digital Plane-Wave Filters”, IEEE Antennas and Propagation Letters (AWPL), 2018, In press.
69. R. Cintra, T. Trugillo, R. Oliviera, F. Bayer, A. Leite and A. Madanayake, “Low-complexity 8-point DCT Approximation Based on Angle Similarity for Image and Video Coding”, Springer Multidimensional Systems and Signal Processing (MSSP), 2018, Accepted.
70. Y. Wang, J. Liang, S. Handagala, A. Madanayake, and S. Mandal, “Delta-Sigma Noise-Shaping in 2D Space-Time for Wideband Antenna Array Receivers”, IEEE Trans. on Circuits and Systems (TCAS)-I:Regular Papers, 2018, Accepted.
71. Y. Wang, J. Liang, A. Madanayake, L. Belostotski, and S. Mandal, “Delta-Sigma Noise-Shaping in 3D Space-Time for 2-D Wideband Antenna Array Receivers”, Springer Multidimensional Systems and Signal Processing (MSSP), 2018, Accepted.
72. D. Coelho, R. Cintra, F. Bayer, S. Kulasekera, A. Madanayake, P. Martinez, T. Silvera, R. Oliveira, and V. Dimitrov. “Low-Complexity Loeffler DCT Approximations for Image and Video Coding”, Journal of Low Power Electronics and Applications (JLPEA), 2018, Published Online, 2018.
73. V. Ariyarathna, D. F. G. Coelho, S. Pulipati, R. J. Cintra, F. M. Bayer, V. S. Dimitrov, and A. Madanayake, “Multibeam Digital Array Receiver Using a 16-point Multiplierless DFT Approximation ”, IEEE Trans. on Antennas and Propagation (TAP), vol. 67, issue 2, 2019.
74. G. Mendis, J.Wei-Kocsis, and A. Madanayake, “Deep Learning based Radio-Signal Identification with Hardware Design”, IEEE Trans. on Aerospace and Electronic Systems(TAES), vol. 55, issue 1, 2019.
75. S. Pulipati, V. Ariyarathna, C. Edussooriya, R. Wijesekara, L. T. Bruton, and A. Madanayake,“A 16-Element 2.4-GHz Multi-Beam Array Receiver using 2-D Spatially-Bandpass Digital Filters”, IEEE Trans. on Aerospace and Electronic Systems(TAES), 2019, Accepted.
76. A. Sheldon, L. Belostotski, G. Messier, and A. Madanayake, “Impact of Noise Bandwidth on Noise Figure”, IEEE Trans. on Instrumentation and Measurement Systems, vol. 68l, issue 7, 2019.
77. N. Udayanga, A. Madanayake, S.I. Hariharan, S. Mandal, J. Liang, L. Belostotski, and L.T. Bruton, “Continuous-Time Algorithms for Solving Maxwell’s Equations using Analog Circuits”, IEEE Trans. on Circuits and Systems-I:Regular Papers, 2019, Accepted.
78. T.S. Rappaport, Y. Xing, O. Kanhere, S. Ju, A. Madanayake, S. Mandal, A. Alkhateeb, and G.C. Trichopoulos, “Wireless Communications and Applications Above 100 GHz: Opportunities and Challenges for 6G and Beyond ”, IEEE ACCESS, vol. 7, 2019.
79. V. Ariyarathna, S. Pulipati, S. Madhishetty, D. Coelho, F. Bayer, R. Cintra, S. Mandal, L. Belostotski, T.S. Rappaport and A. Madanayake, “Towards a Low-SWaP 1024-Beam Digital Array: A 32-Beam Sub-System at 5.8 GHz ”, IEEE Trans. on Antennas and Propagation, 2019, Accepted.
80. J. Zhao, X. Wang, H. Viswanathan and A. Madanayake, “ Compressed Beam Alignment with Out-of-Band Assistance in Millimeter Wave Cellular Networks”, IEEE Trans. on Mobile Computing, 2019, Accepted.
81. N. Liyanage, C. Wijenayake, C. Edussooriya, A. Madanayake, P. Agathoklis, L. T. Bruton, and E. Ambikairajah, Multi-Depth Filtering and Occlusion Suppression in 4-D Light Fields: Algorithms and Architectures”, Elsevier Signal Processing, 2019, Accepted.
82. J. Glickstein, J. Liang, S. Choi, A. Madanayake and S. Mandal, “Power-efficient ELF Wireless Communications using Electro-Mechanical Transmitters”, IEEE ACCESS, 2020, Accepted.
83. S. Perera, A. Madanayake and R. J. Cintra, “Radix-2 Self-Recursive Sparse Factorizations of Delay Vandermonde Matrices for Wideband Multi-Beam Antenna Arrays”, IEEE ACCESS, 2020, Accepted.
84. V. Coutinho, S. Pulipati, V. Ariyarathna, D. Coelho, F. Bayer, V.S. Dimitrov, R.J. Cintra and A. Madanayake, “A Low-SWaP 16-Beam 2.4 GHz Digital Phased Array Receiver using DFT Approximation”, IEEE Trans. on Aerospace and Electronic Systems (TAES), 2020, Accepted.
85. A. Madanayake, N. Akram, V. Ariyarathna, D. Coelho, V. Countinho, R. Cintra, F. Bayer, S. Mandal and T.S. Rappaporet, “Fast Radix-32 Approximate DFTs for 1024-Beam Digital RF Beamforming”, IEEE ACCESS, 2020, Accepted.
86. S. Perera, A. Madanayake, and R. J. Cintra, “Efficient and Self-Recursive Delay Vandermonde Algorithm for Multi-Beam Antenna Arrays”, IEEE Open Journal of Signal Processing, 2020, Accepted.
87. Y. Wang, A. Madanayake, G. Mendis, J. Wei-Kocsis, S. Mandal, “A 1.0-8.3 GHz Cochlea-Based Real-Time Spectrum Analyzer with -Modulated Digital Outputs”, IEEE Trans. on Circuits and Systems-I: Regular Papers, 2020, Accepted.
88. A. Madanayake, N. Akram, D. Coelho, R.J. Cintra, V. Ariyarathna, F. Bayer, S. Mandal, V. Coutinho, and T.S. Rappaport, “Fast Radix-32 Approximate DFTs for 1024-Beam Digital RF Beamforming”, IEEE ACCESS 2020, Accepted.
89. J. Vorhies, A. Hoover, and A. Madanayake, “Adaptive Filtering of 4-D Light Field Images for Depth-Based Image Enhancement”, IEEE Trans. on CAS-2, 2020, Accepted.
90. N. Udayanga, S.I. Hariharan, J. Liang, S. Mandal, L. Belostotski, L. T. Bruton, and A. Madanayake, “A Radio-frequency Analog Computing Approach for Computational Electromagnetics”, IEEE Journal of Solid State Circuits (JSSC), 2020, Accepted.
91. S. Krishna Gullapalli, A. Madanayake, C. Edussooriya, C. Wijenayake, D. Dansereau, and L. T. Bruton, “Wave-Digital Filter Circuits for Single-Chip 4-D Light Field Depth-Based Enhancement”, (Springer) Journal of Multidimensional Systems and Signal Processing (MSSP), 2020, Accepted.
92. R. Ali, G. Messier, A. Sutinjo, A. Madanayake and L. Belostotski, “Impact of Bandwidth on Antenna-Array Noise Matching ”, IET Electronic Letters, 2020, Accepted.
93. C. Edussooriya, C. Wijenayake, A. Madanayake, N. Liyanage, S. Premaratne, J. T. Vorhies, D. G. Dansereau, P. Agathoklis and L. T. Bruton, “Real-Time Light Field Signal Processing using 4D/5D Digital Filter FPGA Circuits”, IEEE Trans. on Circuits and Systems:-Express Briefs, 2020, Accepted.
94. H. Zhao, U. De Silva, S. Pulipati, S. B. Venkatakrishnan, S. Bhardwaj, J. L. Volakis, S. Mandal, and A. Madanayake, “A Broadband Multi-Stage Self-Interference Canceller for Full-Duplex MIMO Radios”, IEEE Trans. on Microwave Theory and Techniques (MTT), 2021, Accepted.
95. L. Belostotski, M. Okoniewski, A. Sutinjo and A. Madanayake, “Framework for the Co-Simulation of Antenna Arrays and Receivers”, IEEE Trans. on Antennas and Propagation (TAP), 2021, Accepted.
96. S. M. Perera, A. Madanayake, A. Ogle, D. Silverio, and J. Qi, “A Fast Algorithm to Solve Delay Vandermonde Systems in Phased-Array Digital Receivers”, IEEE Trans. Aerospace and Electronic Systems (TAES), 2021, Accepted.
97. N. Akram, V. Ariyarathne, S. Mandal, L. Belostotski, T. Rappaport, and A. Madanayake, “Spacetime Frequency-Multiplexed Digital-RF Array Receivers with Reduced ADC Count ”, IEEE Trans. on Circuits and Systems-II: Express Briefs, 2021, Accepted.
98. P. Sen, V. Ariyarathne, A. Madanayake and J. Jornet, “ A Versatile Experimental Testbed for Ultrabroadband Communication Networks Above 100 GHz”, Computer Networks, 2021, Accepted.
99. J. Liang, N. Udayanga, SI Hariharan, S. Mandal and A. Madanayake, “An Offset-Cancelling Discrete-Time Analog Computer for Solving 1-D Wave Equations”, IEEE Journal of Solid State Circuits (JSSC), 2021, Accepted.
100. H. Malavipathirana, N. Udayanga, SI Hariharan, S. Mandal and A. Madanayake, “A Fast and Fully-Parallel Analog CMOS Solver for Nonlinear PDEs”, IEEE Trans. on Circuits and Systems-I: Regular Papers, 2021, Accepted.
101. D. Coelho, S. Perera, R. J. Cintra and A. Madanayake, “Low-complexity Scaling Methods for DCT-II Approximation ”, IEEE Trans. on Signal Processing, 2021, Accepted.
102. N. Akram, V. Ariyarathna, S. Pulipati, S. Venkatakrishnan, D. Psychogiou, J. Volakis, T. Marzetta, T. Rappaport, and A. Madanayake„ “Frequency-Multiplexed Array Digitization for MIMO Receivers: 4-Antennas/ADC at 28 GHz on Xilinx ZCU-1285 RF SoC ”, IEEE Access, 2021, Accepted.
103. W. Liu, A. Madanayake, L. Yu, Q. Shen, J. Cai, “Recent Advances in Design and Signal Processing for Antenna Arrays 2020”, Editorial, Special Issue- International Journal of Antennas and Propagation, Hindawi, 2021.
104. L. Belostotski, A. Sutinjo, R. Subrahmaniam, A. Madanayake, and S. Mandal, “General Framework for Array Noise Analysis and Noise Performance of a Two-Element Interferometer with a Mutual-Coupling Canceler”, IEEE Trans. on Antennas and Propagation (TAP), 2022.
Conference papers
1. A. Madanayake, L. T. Bruton, and C. J. Comis, “FPGA Architectures for Real-time 2D/3D FIR/IIR Plane Wave Filters,” in IEEE International Symposium on Circuits and Systems (ISCAS), May 2004, Vancouver, Canada. pp. 613-616.
2. A. Madanayake, and L. T. Bruton, “Fully-multiplexed First-order 3D IIR Frequency-planar Filter Module,” in IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), December 2006, Singapore. pp. 1224-1227.
3. A. Madanayake, and L. T. Bruton, “Single-chip FPGA Architecture for 3D IIR Broadband Spatio-temporal Beam Plane-wave Filters,” in IEEE International Symposium on Circuits and Systems (ISCAS), May 2006, Kos Island, Greece. pp. 4927-4930.
4. A. Madanayake, and L. T. Bruton, “Circular Array Based 2D Recursive Filtering using a Spatio-temporal Helix Transform,” in IEEE International Symposium on Circuits and Systems (ISCAS), May 2006, Kos Island, Greece. pp. 4919-4922.
5. A. Madanayake, and L. T. Bruton, “A Low-complexity Scanned-array 3D IIR Frequency-planar Filter,” in IEEE International Symposium on Circuits and Systems (ISCAS), May 2005, Kobe, Japan. pp. 2032-2035.
6. A. Madanayake, and L. T. Bruton, “A High-performance Distributed-parallel-processor Architecture for 3D IIR Digital Filters,” in IEEE International Symposium on Circuits and Systems (ISCAS), May 2005, Kobe, Japan. pp. 1457-1460.
7. A. Madanayake, and L. T. Bruton, “On The Design and FPGA Implementation of Real-time Scanned-array 2D Frequency-planar Beam Filters,” in European Association for Signal Processing (EUSIPCO), September 2004, Vienna, Austria. pp. 2011-2014.
8. A. Madanayake, S. V. Hum, and L. T. Bruton, “UWB Beamforming Using Digital 2D IIR Frequency Planar Filters,” in IEEE Antennas and Propagation Symposium, July 2008, San Diego, CA.
9. A. Madanayake, and L. T. Bruton, “A Real Time Systolic Array Implementation of Two Dimensional
IIR Filters for Smart Antenna Array Applications,” in IEEE International Symposium on Circuits and Systems (ISCAS), May 2008, Seattle, WA. pp. 1252-1255.
10. A. Madanayake, and L. T. Bruton, “Selective Enhancement of Space-time Broadband Spiral-waves using 2D IIR Digital Filters,” in IEEE International Symposium on Circuits and Systems (ISCAS), May 2008, Seattle, WA. pp. 696-699.
11. A. Madanayake, and L. T. Bruton, “Digital Filtering of Toroidal Sensor-array Signals using 3D IIR Frequency-planar Digital Filters,” in IEEE North East Workshop on Circuits and Systems (NEWCAS)/Midwest Symposium on Circuits and Systems (MWSCAS), August 2007, Montreal, Canada, pp. 598-601.
12. A. Madanayake, and L. T. Bruton, “Time-multiplexed Systolic-array Processors for Real-time 2D IIR Beam Plane-wave Filters,” in IEEE North East Workshop on Circuits and Systems (NEWCAS)/Midwest Symposium on Circuits and Systems (MWSCAS), August 2007, Montreal, Canada, pp. 686-689.
13. A. Madanayake, and L. T. Bruton, “FPGA Prototyping of Spatio-temporal 2D IIR Broadband Beam Plane Wave Filters,” in IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), December 2006, Singapore. pp. 542-545.
14. A. Madanayake, T. K. Gunaratne, and L. T. Bruton, “High Frequency Systolic Broadband Beamforming Using Polyphase 3D IIR Frequency-planar Digital Filters with Interleaved A/D Sampling,” in IEEE International Symposium on Circuits and Systems (ISCAS), May 2009, Taiwan. pp. 329-332.
15. T. K. Gunaratne, A. Madanayake, and L. T. Bruton, “An FPGA Architecture for Real-time Polyphase 2D FIR Double Trapezoidal Plane-wave Filters,” in Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), December 2008, Macao, China. pp. 984-987.
16. A. Madanayake, and L. T. Bruton, “Systolic Array Processors for 2D IIR Spatio-Temporal Beamforming Wave-Digital Filters (WDFs),” in IEEE Pacific Rim Conference (PACRIM), August 2009, Victoria, BC, Canada. pp. 47-52.
17. A. Madanayake, and L. T. Bruton, “A Review of 2D/3D IIR Plane-wave Real-time Digital Filter Circuits,” in IEEE Canadian Conference on Electrical and Computer Engineering (CCECE), May 2005, Saskatoon, Canada. pp. 1935-1941.
18. A. Madanayake, and L. T. Bruton, “FPGA Based Design Flow for DSP,” in IEE Regional Conference on ICT and eparadigms, June 2004, Colombo, Sri Lanka. pp. 49-55.
19. A. Madanayake, and L. T. Bruton, “Biomedical Applications for Single-FPGA 2D Broadband Scanned-array Plane-wave Filters,” in Fifth Alberta Biomedical Conference, October 2004, Banff, Alberta, Canada.
20. A. Madanayake, and L. T. Bruton, “A Single A/D Converter VLSI Architecture Prototype of a 2D IIR Spacetime Broadband Plane-wave Digital Filter using a Xilinx Virtex-II xc2v2000 fg676-4 FPGA Device,” in IET (Sri Lanka) Annual Technical Conference, September 2006, Colombo, Sri Lanka.
21. A. Madanayake, “Teaching Multidimensional Circuits and Systems (MD-CAS) in the 21st Century,” in IEEE International Symposium on Circuits and Systems (ISCAS) Education Workshop, May 2008, Seattle, WA.
22. A. Madanayake, and L. T. Bruton, “Multi Dimensional Raster Scanned LC Ladder Wave Digital Filter Hardware For Directional Filtering in Space-Time,” in IEEE International Symposium on Circuits and Systems (ISCAS), May 2010, Paris, France. pp. 1005-1008.
23. A. Madanayake, C. Wijenayake, N. Rajapaksha, R. M. Joshi, A. Chassot, E. Matas, and L. T. Bruton, “Multi Dimensional DSP Algorithms and Hardware Architectures for Widefield Aperture Arrays Aimed at The Square Kilometer Array (SKA) Project,” in Electronic and Telecommunication Engineering, University of Moratuwa, August 2010, Moratuwa, Sri Lanka. pp. 2-8.
24. A. Madanayake, and L. T. Bruton, “Systolic Array 3D Wave Digital Beam Filters,” in IEEE 2010 Asia Pacific Conference on Circuits and Systems (APCCAS), December 2010, Malaysia. pp. 1055-1058.
25. N. Ganganath, P. Illangakoon, G. Attanayake, T. Yapa Bandara, A. Madanayake, R. Rodrigo, and L. T. Bruton, “Scanned Array Audio Beamforming using 2nd and 3rd order 2D IIR Beam Filters on FPGA,” in IEEE International Conference on Microelectronics (ICM), December 2010, Cairo, Egypt, pp. 451-454.
26. N. Rajapaksha, A. Madanayake, and L. T. Bruton, “Raster-Scanned Wave-Digital Filter Architectures for Multi-Beam 2D IIR Broadband Beamforming,” in IEEE International Conference on Microelectronics (ICM), December 2010, Cairo, Egypt. pp. 112-115.
27. C. Wijenayake, A. Madanayake, and L. T. Bruton, “Systolic Array Architecture for 2D IIR Wideband Dual Beam Space-Time Plane-Wave Filters,” in IEEE MidWest Symposium on Circuits and Systems (MWSCAS), August 2010, Seattle, WA. pp. 229-232.
28. C. Wijenayake, A. Madanayake, and L. T. Bruton, “FPGA Prototypes of Differential-Form 2D-IIR Systolic Array DSP Architectures for Multi Beam Plane Wave Filters,” in IEEE SIPS Workshop, September 2010, California. pp. 58-63.
29. N. Rajapaksha, A. Madanayake, and L. T. Bruton, “Elementary Concepts in 2D IIR Wave Digital Filter Design for Space Time Array Processing,” in Department of Electronic and Telecommunications, University of Moratuwa, July 2011, Sri Lanka.
30. C. Wijenayake, A. Madanayake, L. Belostotski, and L. T. Bruton, “Recent Progress on Analog/Digital VLSI 2D Filter Circuits For Beamforming Antenna Arrays,” in IEEE Multidimensional Systems (nDS), September 2011, Pointeres, France.
31. R. M. Joshi, A. Madanayake, L. T. Bruton, and M. Maini, “Discrete-Space Continuous Time Analog Circuits for Spatially-Bandpass 2D IIR Beam Filters,” in IEEE Multidimensional Systems (nDS), September 2011, Pointeres, France.
32. L. Belostotski, A. Madanayake, M. Petursson, and L. T. Bruton, “Modeling The Effects of Electromagnetic Inter-Element Coupling in Broadband Antenna Arrays using Multidimensional DSP,” in IEEE Multidimensional Systems (nDS), September 2011, Pointeres, France.
33. A. Madanayake, C. Wijenayake, N. Rajapaksha, K. S. Lee, L. Belostotski, and L. T. Bruton, “A New Class of Spatially-Discrete Time-Continuous 2D IIR Filters Based on Wave-Digital-Filter Theory,” in IEEE 2011 Pacific Rim Conference on Circuits, Signal Processing, and Computers (PACRIM), August 2011, Victoria, Canada. pp. 685-690.
34. A. Madanayake, D. Mugler, and N. Rajapaksha, “An Asynchronous Array Architecture for DCT-4/DST-4 on a 65nm Achronix SDP60 FPGA,” in IEEE MidWest Symposium on Circuits and Systems (MWSCAS), August 2011, Seoul, South Korea.
35. A. Edirisuriya, A. Madanayake, J. Adikari, and V.S. Dimitrov, “An Architecture for a 77-bit Multiple Radix Multiplier Building Block,” in IEEE MidWest Symposium on Circuits and Systems (MWSCAS), August 2011, Seoul, South Korea.
36. R.M. Joshi, A. Madanayake, and L. T. Bruton, “A 2D IIR Spatially-Bandpass Antenna Beamformer on a 65nm Achronix SPD60 FPGA,” in IEEE MidWest Symposium on Circuits and Systems (MWSCAS), August 2011, Seoul, South Korea.
37. A. Madanayake, R. Wimalagunaratne, D. Dansereau, and L. T. Bruton, “Design and FPGA Implementation of 1st Order 4D IIR Frequency Hyperplanar Digital Filters,” in IEEE MidWest Symposium on Circuits and Systems (MWSCAS), August 2011, Seoul, South Korea.
38. A. Madanayake, R. J. Cintra, D. Onen, V. S. Dimitrov, and L. T. Bruton, “Algebraic Integer based 8x8 2-D DCT Architecture for Digital Video Processing,” in IEEE International Symposium on Circuits and Systems (ISCAS), May 2011, Rio, Brazil. pp. 1247-1250.
39. A. Madanayake, H. R. Bahrami, and L. T. Bruton, “Antenna Array 2D-IIR Digital Filters for Carrier Modulated Frequency-Agile and Cognitive Wireless Systems,” in IEEE International Symposium On Circuits and Systems (ISCAS), May 2011, Rio, Brazil. pp. 961-964.
40. N. Rajapaksha and A. Madanayake, “Asynchronous-QDI 2D IIR Digital Filter Circuits,” in IEEE International Symposium On Circuits and Systems (ISCAS), May 2011, Rio, Brazil. pp. 665-668.
41. A. Madanayake, L. Belostotski, C. Wijenayake, and L. T. Bruton, “Analog 2D Fan Filters from Discrete Domain Transfer Functions,” in IEEE International Symposium On Circuits and Systems (ISCAS), May 2011, Rio, Brazil. pp. 1652-1655.
42. A. Madanayake, C. Wijenayake, R. M. Joshi, J. Adams, J. Grover, J. Carletta, T. Hartley, and T. Ogunfunmi, “Teaching Freshmen VHDL Based Digital Design,” in IEEE International Symposium on Circuits and Systems (ISCAS), May 2012, Seoul, South Korea. pp. 2701-2704.
43. A. Madanayake, and L. T. Bruton, “A Combined Approach to Research and Graduate-Level Teaching of Multidimensional Signal Processing, Circuits and Systems,” in IEEE International Symposium on Circuits and Systems (ISCAS), May 2012, Seoul, South Korea. pp. 2693-2696.
44. S. Madhishetty, A. Madanayake, R. J. Cintra, V. Dimitrov, and D. Mugler, “Error-Free VLSI Architecture for the 2-D Daubechies 4-Tap Filter Using Algebraic Integers,” in IEEE International Symposium on Circuits and Systems (ISCAS), May 2012, Seoul, South Korea. pp. 1484-1487.
45. R. Wimalagunaratne, A. Madanayake, D. Dansereau, and L. T. Bruton, “A Systolic-Array Architecture for First-Order 4-D IIR Frequency-Planar Digital Filters,” in IEEE International Symposium on Circuits and Systems (ISCAS), May 2012, Seoul, South Korea. pp. 3069-3072.
46. C. Wijenayake, A. Madanayake, Y. Xu, L. Belostotski, and L. T. Bruton, “Discrete Space Continuous Time 2D Delay Block Using 2-D All-Pass Frequency Planar Networks,” in IEEE International Symposium on Circuits and Systems (ISCAS), May 2012, Seoul, South Korea. pp. 664-667.
47. A. Madanayake, C. Wijenayake, N. Tran, S. V. Hum, L. T. Bruton, and T. Cooklev, “Directional Spectrum Sensing using Tunable Multi-D Space-Time Discrete Filters,” in IEEE International Symposium on World of Wireless, Mobile and Multimedia Networks (WoWMoM), June 2012, San Francisco, CA.
48. J. Kota, D. Holman, E. Matas, K. Wilson, A. Madanayake, and M. Elbuluk, “High-Voltage Class-D Direct-Drive Audio Amplifier for Electrostatic Loudspeakers,” in IEEE International Symposium on Circuits and Systems (MWSCAS), August 2012, Boise, Idaho. pp. 574-577. “Best student paper award”.
49. C. Wijenayake, A. Madanayake, L. Belostotski, Y. Xu, and L. T. Bruton, “Real-time UWB 2-D Analog Fan Filters for Steerable Highly Selective Analog Aperture Arrays,” in CASPER Workshop, August 2012, NRAO Green Bank Radio Astronomy Observatory, West Virginia. “Abstract and talk only”.
50. N. Rajapaksha, A. Madanayake, and L. T. Bruton, “Three-dimensionalWave-digital Filter Beamformer Architectures for RF Dense Aperture Array Applications,” in CASPER Workshop, August 2012, NRAO Green Bank Radio Astronomy Observatory, West Virginia. “Abstract and talk only”.
51. S. Kondapalli, A. Madanayake, and L. T. Bruton, “Digital Architectures for RF Real-time Ultra WideBand Aperture-Array Beamforming using 2-D IIR Spatio-temporal Beam Filters,” in CASPER Workshop, August 2012, NRAO Green Bank Radio Astronomy Observatory, West Virginia. “Abstract and talk only”.
52. A. Edirisuriya, A. Madanayake, R. J. Cintra, and F. Bayer, “A multiplication-free digital architecture for 1616 2-D DCT/DST transform for HEVC,” in IEEE 27-th Convention of Electrical and Electronics Engineers in Israel (IEEEI), November 2012, Eilat, Israel.
53. N.Rajapaksha, A. Madanayake, L. Belostotski, L. T. Bruton, and K. S. Lee, “Towards RF analog IC realization of wave-discrete filters on 65 nm CMOS,” in IEEE 27-th Convention of Electrical and Electronics Engineers in Israel (IEEEI), November 2012, Eilat, Israel.
54. A. Madanayake, C. Wijenayake, U. Potluri, J. Abeysekara, and D. Mugler, “Low-complexity algorithms for spatio-temporal directional spectrum sensing with applications in cognitive radio,” in Proceedings of SPIE 8753, Wireless Sensing, Localization, and Processing, May 2013, Baltimore, MD.
55. A. Madanayake, C. Wijenayake, T. Gunarathne, L. Belostotski, Y. Xu, and L. T. Bruton, “Rejection of interference and near-field coupled LNA-noise on FPA-fed multi-beam dish antennas using 3D analog filters,” in Proceedings of SPIE 8714, Radar Sensor Technology, May 2013, Baltimore, MD.
56. C. Wijenayake, A. Madanayake, L. T. Bruton, and V. Devabhaktuni, “DOA-Estimation and Source-Localization in CR-Networks Using Steerable 2-D IIR Beam Filters,” in IEEE International Symposium on Circuits and Systems (ISCAS), May 2013, Beijing, China. pp. 65-68.
57. C. Wijenayake, A. Madanayake, Y. Xu, and L. Belostotski, “A Steerable DC-1 GHz All-Pass Filter-Sum RF Space-Time 2-D Beam Filter in 65 nm CMOS,” in IEEE International Symposium on Circuits and Systems (ISCAS), May 2013, Beijing, China. pp. 1276-1279.
58. S. Wijayaratna and A. Madanayake, and L. T. Bruton, “FFT-Based Phase Compensation of 2-D Beam Digital Filters for Electronically Steerable RF Arrays,” in International Midwest Symposium on Circuits and Systems (MWSCAS), August 2013, Columbus, OH. pp. 1007-1010.
59. S. Wijayaratna, A. Madanayake, S. I. Hariharan, and L. T. Bruton, “Reconfigurable Phase-Linearizer for 2-D IIR RF–to–Bits Antenna Array Digital Beam Filters,” in International conference on Information, communication and signal processing (ICICS), December 2013, Taiwan.
60. S. Kondapalli, A. Madanayake, and L. T. Bruton, “Systolic Architectures for RF Antenna Apertures using Integral-form 2-D IIR Beam Filters,” in IEEE Pacific Rim Conference on Communications, Computers and Signal Processing (PACRIM), August 2013, Victoria, BC, Canada. pp. 247-252.
61. A. Madanayake, N. Udayanga, C. Wijenayake, M. Almalkawi, and V. Devabhaktuni, “Directional cyclostationary feature detectors using 2-D IIR RF spiral-antenna beam digital filters,” IEEE International Symposium on Circuits and Systems (ISCAS), June 2014, Melbourne, Australia. pp. 2499-2502.
62. N. Udayanga, A. Madanayake, and C. Wijenayake, “Direction/Location Estimation and Modulation Detection for RF Sources Using Steerable 3-D IIR Digital Beam Filters,” in Proceedings of the SPIE 9103, Wireless Sensing, Localization, and Processing, May 2014, Baltimore, MD.
63. A. Madanayake, A. Sengupta, R. Gomez-Garcia, and L. Belostotski, “A 3-D Spatially-FIR RF Frustum Digital Filter with Microwave Channelization for FPAs,” in Proceedings of the IEEE Radar Conference (RadarCon), May 2014, Cincinnati, OH. pp. 1378-1383.
64. A. Sengupta, A. Madanayake, R. Gomez-Garcia, and E. Engeberg, “Wideband aperture array using RF channelizers and massively-parallel digital 2D IIR filterbank,” in Proceedings of the SPIE 9077, Radar Sensor Technology, May 2014, Baltimore, MD.
65. A. Madanayake, A. Sengupta, and L. Belostotski, “Bio-Inspired Multi-Dimensional Multi-Beam Aperture Arrays: Theory, Design and Simulation for EM Remote Sensor Systems,” in International Conference on Electromagnetics in Advanced Applications (ICEAA), August 2014, Palm Beach, Aruba.
66. A. Madanayake, S. Wijayarathna, and C. Wijenayake, “Combined Time-Delay FIR and 2-D IIR Filters for Ears, Radar, and Imaging Applications,” in IEEE MidWest Symposium on Circuits and Systems (MWSCAS), August 2014, Texas. pp. 543-546.
67. A. Madanayake, L. Belostotski, C. Wijenayake, L. T. Bruton, and V. Devabhaktuni, “Analog 2-D IIR Beam Filters for EARS in UAS Ecosystems,” in IEEE International Symposium on Antennas and Propagation, July 2014, Memphis, TN. pp. 991-992.
68. S. Kulasekera, A. Madanayake, R. J. Cintra, F.M. Bayer, and U.S. Potluri, “Low-complexity multiplierless DCT approximations for low-power HEVC digital IP cores,” in Proceeding of the SPIE 9089, Geospatial InfoFusion and Video Analytics and Motion Imagery for ISR and Situational Awareness, May 2014, Baltimore, MD.
69. S. Wijayaratna, A. Madanayake, D. L. Beal, and L. T. Bruton, “FPGA Architectures for Electronically Scanned Wide-band RF Beams using 3-D FIR/IIR Digital Filters for Rectangular Array Aperture,” in Proceeding of the SPIE 9077, Radar Sensor Technology, May 2014, Baltimore, MD.
70. C. Wijenayake, A. Madanayake, and L. Belostotski, “Continuous-time 2-D IIR+time-delay linear aperture arrays,” in IEEE Radio and Wireless Week (RWW), January 2015, San Diego, California. pp. 38-40.
71. V. Cutinho, R. J. Cintra, F. Bayer, S. Kulasekara, and A. Madanayake, “Low-complexity Pruned 8-point DCT Approximations for Image Encoding,” in IEEE International Conference on Electronics, Communications and Computers (CONIELECOMP), February 2015, Cholula, Mexico. pp. 1-7. “Best Paper Award”.
72. Z. Lin, A. Madanayake, C. Wijenayake, and N. Dornback, “Recent Advances in Multidimensional Systems and Signal Processing: an Overview,” in IEEE International Symposium on Circuits and Systems (ISCAS), May 2015, Lisbon, Portugal. pp. 2365-2368.
73. N. Udayanga, C. Wijenayake, P. Ahmadi, and L. Belostotski, “Tunable Multiband RF CMOS Active Filter Arrays,” in IEEE International Symposium on Circuits and Systems (ISCAS), May 2015, Lisbon, Portugal. pp. 1682-1685.
74. S. Kulasekara, R. J. Cintra, F. Bayer, and D. Suarez, “Multi-Beam Receiver Apertures Using Multiplierless 8-Point Approximate DFT,” in IEEE Radar Conference, May 2015, Arlington, VA. pp. 1244-1249.
75. N. Udayanga, C. Wijenayake, A, Madanayake, and R. Acosta, “Applebaum Adaptive Array Apertures with 2-D IIR Space-Time Circuit-Network Resonant Pre-Filters,” in IEEE Radar Conference, May 2015, Arlington, VA. pp. 0611-0615.
76. V. Ariyawansa, S. Kulasekera, A. Madanayake, L. Belostotski, D. Suarez, R. J. Cintra, F. Bayer, and K. S. Lee, “Multi-beam 4 GHz Microwave Apertures Using Current-Mode DFT Approximation on 65nm CMOS,” in IEEE International Microwave Symposium (IMS), May 2015, Phoenix. pp. 1-4.
77. A. Madanayake, N. Udayanga, C. Wijenayake, and L. T. Bruton, “Electronically Steerable Directed Energy using Space-Time Network Resonant Digital Systems,” in IEEE Antennas and Propagation Symposium (AP-S), July 2015, Vancouver, Canada. pp. 2283-2284.
78. S. Kulasekara, C. Wijenayake, A. Madanayake, R. J. Cintra, F. Bayer, and D. Suarez, “Multi-Beam 8x8 RF Aperture Digital Beamformers Using Multiplierless 2-D FFT Approximations,” in IEEE Moratuwa Engineering Research Conference (MerCon), April 2015, Moratuwa, Sri Lanka. pp. 260-264.
79. A. Madanayake, C. Wijenayake, L. Bruton, and L. Belostotski, “An Overview of Multi-Dimensional RF Signal Processing for Array Receivers,” in IEEE Moratuwa Engineering Research Conference (MerCon), April 2015, Moratuwa, Sri Lanka. pp. 255-259.
80. T. Randeny, A. Sengupta, A. Madanayake, Y. Li, and C. Li, “Aperture-Array Directional Sensing using 2-D Beam Digital Filters with Doppler-Radar Front-Ends,” in IEEE Moratuwa Engineering Research Conference (MerCon), April 2015, Moratuwa, Sri Lanka. pp. 265-270.
81. S. Handagala, A. Madanayake, and N. Udayanga, “Design of a Millimeter-Wave Dish-Antenna based 3-D IIR Radar Digital Velocity Filter,” in IEEE Multidimensional Systems (nDS), September 2015, Portugal.
82. V. Seneviratne, A. Madanayake, and N. Udayanga, “Wideband 32-element 100-MHz 2-D IIR Beam Filters using ROACH-2 Virtex-6 sx475t FPGA,” in IEEE Multidimensional Systems (nDS), September 2015, Portugal.
83. N. Udayanga, A. Madanayake, and L. T. Bruton, “Increasing SINR of Microwave Applebaum Adaptive Arrays using Analog 2-D IIR Space-Time Network-Resonant Beam Filters,” in IEEE International conference on Information, communication and signal processing (ICICS), December 2015, Singapore.
84. V. Ariyaratne, A. Madanayake, and P. Agathoklis, “Wideband Mixed Microwave-Digital 2-D IIR Beam Filters for Nested Uniform Linear Array Processing,” in IEEE International conference on Information, communication and signal processing (ICICS), December 2015, Singapore.
85. A. Madanayake, C. Wijenayake, L. Belostotski, L. T. Bruton, and Y. Xu, “Linear RF Apertures Using 2-D Analog Beam Filters,” in IEEE International Symposium on Circuits and Systems (ISCAS), 2016, Montreal, Canada.
86. N. Udayanga, V. Ariyarathna, and A. Madanayake, “Wideband Delay-Sum Digital Aperture Using Thiran All-Pass Fractional Delay Filters,” in IEEE Radar Conference (RadarCon), May 2016, Philadelphia.
87. S. Handagala, A. Madanayake and L. T. Bruton, “Delta-Sigma Noise Shaping in 2D Spacetime for Uniform Linear Aperture Array Receivers,” in IEEE Moratuwa Engineering Research Conference (Mer-Con), 2016, Moratuwa, Sri Lanka.
88. V. Seneviratne, A. Madanayake and L. T. Bruton, “A 480MHz ROACH-2 FPGA Realization of 2-Phase 2-D IIR Beam Filters for Digital RF Apertures,” in IEEE Moratuwa Engineering Research Conference (MerCon), 2016, Moratuwa, Sri Lanka. “Best Paper Award, Telecommunications Track”.
89. A. Madanayake and R. J. Cintra, “Approximate DFT Algorithms for RF Multi-Beam Beamforming,” in International Industrial Mathematics Conference, The University of Sri Jayewardenepura, 2016, Sri Lanka. “Abstract”.
90. G. Mendis, J. Wei, and A. Madanayake, “Deep Learning Based Doppler Radar for Micro UAS Detection and Classification,” in IEEE Military Communications Conference (MILCOM), November 2016, Baltimore.
91. G. Mendis, J. Wei, and A. Madanayake, “Deep Learning-Based Automated Modulation Classification for Cognitive Radio,” in IEEE International Conference on Communication Systems (ICCS), December 2016, Shenzhen, China.
92. A. Madanayake, V. Ariyarathna, N. Udayanga, P. Ahmadi, L. Belostotski, A. Nikoofard, and S. Mandal, “Analog 65nm CMOS 5GHz Sub-Arrays with ROACH-2 FPGA Beamformers for Hybrid Aperture-Array Receivers,” in GoMacTech Conference, March 2017, Reno, NV.
93. L. Belostotski, P. Ahmadi and A. Madanayake, “0.96-to-5.1GHz 4-Element Spatial-Analog IIR enhanced Delay-and-Sum Beamformer,” in IEEE International Microwave Symposium (IMS), June 2017, Hawaii.
94. C. Wijenayake, N. Udayanga, L. Belostotski and A. Madanayake, “All-Pass Filter based Synthesis of Multifunctional Microwave Active Circuits,” in IEEE Vehicular Technologies Conference, 2017, Australia.
95. V. Ariyarathna, N. Udayanga, L. Belostotski, S. Perera, A. Madanayake, and R. J. Cintra, “Design Methodology of an Analog 9-Beam Squint-Free Wideband IF Multi-Beamformer for mmW Applications,” in IEEE Moratuwa Engineering Research Conference (MERCON), 2017, Moratuwa, Sri Lanka.
96. C. Seungdeog, M. Tarek, S. Dharmasena, S. Mandal, J. Glickstein and A. Sehirlioglu, “Energy-Efficient ULF/VLF Transmitters Based on Mechanically Rotating Dipoles,” in IEEE Moratuwa Engineering Research Conference (MERCON), 2017, Moratuwa, Sri Lanka.
97. V. Ariyarathna, A. Madanayake, L. Belostotski, S. Perera, R. J. Cintra, and N. Udayanga, “Design of a Low-Complexity Wideband Analog True-Time-Delay 5-Beam Array in 65nm CMOS,” in IEEE MidWest Symposium on Circuits and Systems (MWSCAS), August 2017, Boston.
98. N. Udayanga, S. I. Hariharan and A. Madanayake, “Continuous-Time Algorithms for Solving the ElectromagneticWave Equation in Analog ICs,” in IEEE MidWest Symposium on Circuits and Systems (MWSCAS), August 2017, Boston.
99. Y. Wang, S. Handagala, A. Madanayake, S. Mandal and L. Belostotski, “N-Port LNAs for mmW Array Processors Using 2-D Spatio-Temporal Noise-Shaping,” in IEEE MidWest Symposium on Circuits and Systems (MWSCAS), August 2017, Boston.
100. J. Liang, S. Mandal, A. Madanayake, L. Belostotski, S. Handagala, A. Nikoofard, “Low-Complexity N-Port ADCs Using 2-D Delta-Sigma Noise-Shaping for N-Element Array Receivers,” in IEEE MidWest Symposium on Circuits and Systems (MWSCAS), August 2017, Boston.
101. V. Dimitrov, D. Coelho, L. Rakai, R. J. Cintra, V. Ariyarathna, and A. Madanayake, “A Parallel Method for the Computation of Matrix Exponential based on Truncated Neumann Series,” in IEEE International Symposium on Computer Arithmetic (ARITH), July 2017, London.
102. V. Countinho, V. Ariyarathna, D. Coelho, R. J. Cintra, and A. Madanayake, “An 8–Beam 2.4 GHz Digital Array Receiver Based on a Fast Multiplierless Spatial DFT Approximation,” IEEE 2018 International Microwave Symposium (IMS).
103. S. Pulipati, V. Ariyarathna and A. Madanayake, “A 16–Element 2.4–GHz Digital Array Receiver using 2–D IIR Spatially–Bandpass Plane–Wave Filter,” IEEE 2018 International Microwave Symposium (IMS).
104. N. Liyanage, C. Wijenayake, C. Edussooriya, A. Madanayake, P. Agathoklis, and E. Ambikairah, “Low–Complexity 4–D IIR Filters for Multi–Depth Filtering and Occlusion Suppression in Light Fields,” IEEE 2018 International Symposium on Circuits and Systems (ISCAS), Florence, Italy, 2018.
105. N. Udayanga, A. Madanayake, S. I. Hariharan, and N. Hawk, “Continuous–Time Analog Computing Circuits for Solving the Electromagnetic Wave Equation,” IEEE 2018 International Symposium on Circuits and Systems (ISCAS), Florence, Italy, 2018.
106. N. Akram, A. Madanayake, S. Mandal, S. Handagala, and L. Belostotski, “Multiport ADCs for Microwave Focal Plane Array Dish Receivers,” IEEE 2018 International Symposium on Circuits and Systems (ISCAS), Florence, Italy, 2018.
107. H. Zhao, S. Mandal, V. Ariyarathna, A. Madanayake, and R. J. Cintra, “An Offset–Canceling Approximate–DFT Beamforming Architecture for Wireless Transceivers,” IEEE 2018 International Symposium on Circuits and Systems (ISCAS), Florence, Italy, 2018.
108. V. Ariyarathna, V. Coutinho, S. Pulipati, A. Madanayake, R. Wijesekara, C. Edussooriya, L. T. Bruton, T. Gunaratne, and R. Cintra, “Real-Time 2-D FIR Trapezoidal Digital Filters for 2.4 GHz Aperture Receiver Applications” IEEE MerCon, 2018, (Best Paper Award).
109. S. Pulipati, V. Ariyarathna, C. Edussooriya, C. Wijenayake, X. Wang and A. Madanayake, “Real-Time FPGA-Based Multi-Beam Directional Sensing of 2.4 GHz ISM RF Sources”, IEEE MerCon 2019, (Best Paper Award).
110. A. Madanayake, T.S. Rappaport, E. Alwan, S. Mandal, S. Pulipati, V. Ariyarathna, U. De Silva, and N. Akram, “Multibeam Digital Beamforming on 4-Element Array at 28 GHz using Xilinx RFSoC ZCU1275”, CASPER Workshop 2019, Harvard-Smithsonian Center For Astronomy, Boston.
111. N. Udayanga, A. Madanayake, S.I. Hariharan, S. Mandal, J. Liang, and L. Belostotski, “An Analog-digital HybridWave Equation Solver using a 180 nm Analog CMOS Chip and ROACH-2 Digital FPGA”, CASPER Workshop 2019, Harvard-Smithsonian Center For Astronomy, Boston.
112. N. Akram, S. Pulipati, V. Ariyarathna, U. De Silva, E. Alwan, A. Madanayake, S. Mandal and T. S. Rappaport, “A Direct-Conversion Digital Beamforming Array Receiver with 800 MHz Bandwidth/Channel at 28 GHz using Xilinx RF SoC”, IEEE COMCAS’2019, Israel, 2019.
113. N. Udayanga, H. Malavipathirana, S. I. Hariharan, N. Hawk, D. Mugler, S. Bhardwaj, A. Madanayake, “Hardware Accelerated Fast FDTD of Time Dependent Maxwell’s Equations on Xilinx RF SoC”, 39th Southeastern-Atlantic Regional Conference on Differential Equations (SEARCDE), Embry Riddle Aeronautical University (ERAU), Daytona Beach, 2019 (abstract only).
114. A. Madanayake, N. Akram, E. A. Alwan, S. Bojja Venkatakrishnan, J. L. Volakis, S. Mandal, L. Belostotski, “A Four-Element Digital Array Receiver at 2.4 GHz Using a Single Frequency-Multiplexed ADC”, IEEE Antennas and Propagation Symposium (APS), July, 2019.
115. H. Malavipathirana and A. Madanayake and J. L. Volakis and S. Bhardwaj and F. L. Teixeira, “FPGA-Based FDTD Accelerators for 2DEG Plasma-Wave Device Modeling at THz”, 2019 International Applied Computational Electromagnetics Society Symposium (ACES), 2019.
116. T. Ariyarathna, P. Harankahadeniya, S. Isthikar, N. Pathirana, D. Bandara and A. Madanayake, “Dynamic Spectrum Access via Smart Contracts on Blockchain”, IEEE WCNC 2019, Marrakech, Morocco.
117. S. Pulipati and V. Ariyarathna and U. De Silva and N. Akram and E. Alwan and A. Madanayake, “Design of 28 GHz 64-QAM Digital Receiver”, 2019 International Workshop on Antenna Technology (iWAT), 2019.
118. M. Polese (University of Padova); F. Restuccia (Northeastern University); A. Gosain (Northeastern University); J. M. Jornet (The State University of New York, Buffalo); S. Bhardwaj (Florida International University); V. Ariyarathna (Florida International University); S. Mandal (Case Western Reserve University); K. Zheng (Pi-Radio, Inc.); A. Dhananjay (Pi-Radio, Inc.); M. Mezzavilla (Pi-Radio, Inc.); J. Buckwalter (University of California, Santa Barbara); M. Rodwell (University of California, Santa Barbara); X. Wang (Stony Brook University); M. Zorzi (University of Padova); A. Madanayake (Florida International University); T. Melodia (Northeastern University), ‘MillimeTera: Toward A Large-Scale Open-Source mmWave and Terahertz Experimental Testbed‘, ACM mmNets’2019, Mexico.
119. K. Zheng, A. Dhananjay, M. Mezzavilla, A. Madanayake, S. Bharadwaj, V.Ariyarathna, A. Gosain, T. Melodia, M. Polese, F. Restuccia, J. Jornet, J. Buckwalter, M. Rodwell, S. Mandal, X. Wang, J. Haarla, V. Semkin, “Software-Defined Radios To Accelerate mm-Wave Wireless Innovation”, DySPAN, 2019, New Jersey.
120. S. Pulipati, V. Ariyarathna, M. Khan, S. Bhardwaj, and A. Madanayake, “Aperture-Array & Lens+FPA Multi-Beam Digital Receivers at 28 GHz on Xilinx ZCU 1275 RF SoC”, IEEE International Microwave Symposium (IMS) 2020, to appear.
121. S. Pulipati, V. Ariyarathna, C. Edussooriya, A. Jayaweera, C. Wijenayake, L. Belostotski, A. Madanayake, “FPGA-Based 2-D FIR Frost Beamformers with Digital Mutual Coupling Compensation”, IEEE IMS 2020, to appear.
122. C. Edussooriya, A. Madanayake, N. Liyanage, R. Cintra, E. Ambikairaja, and C. Wijenayake,“Low-Complexity Real-Time Light Field Compression Using 4-D Approximate DCT”, IEEE International Symposium on Circuits and Systems (ISCAS) 2020, To appear.
123. H. Malavipathirana, A. Madanayake, C. Edussooriya, L. Belostotski, J. Liang, N. Udayanga, and S. Mandal, “Spatio-Temporal Delta-Sigma N2-Port ADC Noise Shaping for N-by N Antenna Arrays”, IEEE ISCAS 2020, To appear.
124. N. Udayanga, J. Liang, SI Hariharan, L. Belostotski, L. Bruton, S. Mandal, and A. Madanayake, “Continuous-Time Algorithms for Solving Maxwell’s Equations Using Analog Circuits”, TCAS-I special session paper, IEEE ISCAS 2020, To appear.
125. A. Jayaweera, C. Wijenayake, C. Edussooriya, S. Jayaweera, and A. Madanayake, “Minimax Design of 2-D Complex-Coefficient FIR Filters with Low Group Delay Using Semidefinite Programming”, IEEE ISCAS 2020, To appear.
126. U. De Silva, A. Madanayake, S. Mandal, L. Belostotski, and J. Wei-Kocsis, “An RF-Rate Hybrid CNN Based on a Row-Parallel 45nm Analog-CMOS Inference Accelerator and Xilinx RFSoC”, IEEE ISCAS 2020, To appear.
127. J. Liang, N. Udayanga, A. Madanayake, S.I. Hariharan, S. Mandal, “A Switched-Capacitor- Based Analog Computer for Solving the 1-D Wave Equation”, IEEE ISCAS 2020, To appear.
128. A. Madanayake, U. De Silva, J.G. Mendis, V. Ariyarathna, S. Pulipati, S. Bhardwaj, X.Wang, J.Wei-Kocsis, T. Randeny, S. Mandal, “Physics-Aware Processing of Rotational Micro-Doppler Signatures for DBN-Based UAS Classification Radar”, IEEE RF-ID 2020, To appear.
129. V. Ariyarathna, P. Sen, A. Madanayake, and J. Jornet, “Experimental Wireless Testbed for Ultra-broadband Terahertz Networks”, IEEE WiNTECH 2020.
130. V. Ariyarathna, J. Jornet, and A. Madanayake, “Real-Time Digital Baseband System for Ultra-Broadband THz Communication”, IEEE International Conference on Infrared, Millimeter, and Terahertz Waves, 2020.
131. N. Liyanage, S. Jayaweera, C. Edussooriya, C. Wijenayake, A. Madanayake, P. Agathoklis, L. T. Bruton, E. Ambikairajah, “Multi Depth-Velocity Filters for Enhancing Multiple Moving Objects in 5-D Light Field Videos”, IEEE Moratuwa Engineering Research Conference
(Mercon), Sri Lanka, 2020.
132. S. Pulipati, V. Ariyarathna, A. Dhananjay, M. E. Eltayeb, M. Mezzavilla, J.M. Jornet, S. Mandal, S. Bhardwaj, and A. Madanayake, “Xilinx RF-SoC-Based Digital Multi-Beam Array Processors for 28 / 60 GHz Wireless Testbeds”, IEEE Moratuwa Engineering Research Conference
(Mercon), Sri Lanka, 2020.
133. U. Silva, H. Malavipathirana, S. Pulipati, S. Bhardwaj, S. Mandal, and A. Madanayake, “Implementation and Testing of a Switching Circulator for Twin-Pair STAR Radio Architectures”, IEEE Moratuwa Engineering Research Conference (Mercon), Sri Lanka, 2020.
134. U. De Silva, S. Pulipati, S. Bhardwaj, S. Venkatakrishnan and A. Madanayake, “A Passive STAR Microwave Circuit for 1-3 GHz Self-Interference Cancellation”, IEEE Midwest Symposium on Circuits and Systems (MWSCAS), 2020.
135. N. Akram, S. Venkatakrishnan, J. L. Volakis, D. Psychogiou, T. Marzetta, T. S. Rappaport and A. Madanayake, “Massive-MIMO and Digital mm-Wave Arrays on RF-SoCs using FDM for M-Fold Increase in Antennas per ADC/DAC”, IEEE Radio and Wireless Week (RWW) 2021. Nominated for best student paper award.
136. G. Lasser, D. Psychogiou, Z. Popovich, and A. Madanayake, “MMIC GaAs X-band Isolator with Enhanced Power Transmission Response”, IEEE Radio and Wireless Week (RWW) 2021. Second place winner for student paper award.
137. K. Islam, S. Bhardwaj, and A. Madanayake, “Multimodal Vortex Wave Propagation in Dielectric-Filled Circular Waveguides”, URSI Symposium 2020.
138. D. Pakiyarajah, S. Jayaweera, C. Edussooriya, C. Wijenayake, A. Madanayake, “WLS Design of M-D Complex-Coefficient FIR Filters with Low Group Delay Using Second-Order Cone Programming”, IEEE ISCAS 2021, Korea.
139. J. Liang, H. Malavipathirana, SI Hariharan, A. Madanayake, S. Mandal, “Analog Switched- Capacitor Circuits for Solving the Schrodinger Equation”, IEEE ISCAS 2021, Korea.
140. G. Medina, A. Jida, S. Pulipati, R. Talwar, N. Amala, T. Y. Al-Naffouri, A. Madanayake and M. E. Eltayeb, “Millimeter-Wave Antenna Array Diagnosis with Partial Channel State Information”, IEEE International Communications Conference (ICC), 2021.
141. S. Pulipati, V. Ariyarathna, S. Perea, C. Wijenayake, L. Belostotski, and A. Madanayake, “Digital Uncoupling of Coupled Multi-Beam Arrays”, ACES 2021.
142. N. Dissanayake, D. Pakiyarajah, C. Wijenayake, C. Edussooriya, A. Madanayake, “Weighted Least-Squares Design of 2-D IIR Filters with Arbitrary Frequency Response Using Iterative Second-Order Cone Programming”, ISCAS’22.
143. K. Wickramasinghe, A. Ganeshan, K. Samarasinghe, C. Wijenayake, A. Madanayake, and C. Edussooriya, “A Mostly Online CAS Teaching Experience”, ISCAS’22.
144. H. Abdellatif, V. Ariyarathna, S. Petrushkevich, A. Madanayake, and J. Jornet, “A Real- Time Ultra-broadband Software-Defined Radio Platform for Terahertz Communications”, INFOCOM’22, Demo paper, 2022.